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Method of preparing a plan-view sample of an integrated circuit for transmission electron microscopy, and methods of observing the sample
Method of preparing a plan-view sample of an integrated circuit for transmission electron microscopy, and methods of observing the sample
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机译:制备用于透射电子显微镜的集成电路的平面样品的方法以及观察样品的方法
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摘要
A plan-view sample of an integrated circuit is prepared for transmission electron microscopy by marking a faulty circuit element, lapping the upper surface of the sample to a mirror finish, lapping the lower surface to reduce the thickness of the entire sample, and further processing the lower surface by lapping or dimpling, combined with ion milling as necessary, to thin the sample in the vicinity of the fault. A sample prepared in this way affords a wide view, and can be tilted at large angles. A known thickness of a particular type of layer in the sample can be left by holding the sample at a predetermined angle while the sample is lapped.
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