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Design of a Field-Effect Transistor of Improved Insulator-Semiconductor (SOI) to Reduce Transient Bipolar Current

机译:减小瞬态双极电流的改进型绝缘体半导体(SOI)场效应晶体管的设计

摘要

Forming a gap between the source and / or drain regions of an insulator-semiconductor (SOI) field-effect transistor that is preferably thinner than the thickness of the depletion region, which typically surrounds the source and / or drain regions biased at zero volts, Emitter bipolar transistor formed in the SOI field effect transistor is only transiently reduced during the operating mode in which the field effect transistor governs normal operation of the field effect transistor and also the effective base emitter junction capacitance is transiently increased. The transient reduction of this gain, coupled with the transient reduction of the high-frequency response, is sufficiently compatible with other techniques to reduce parasitic bipolar current spikes to a greater extent than previously achieved and also to reduce such current spikes . The gap-containing transistor structure is applied to an insulator-semiconductor-complementary metal-oxide-semiconductor (SOICMOS) SRAM, effectively suppressing the half-selective recording disturbing effect while maintaining the overcharge storage and the floating body effect in the transistor.
机译:在绝缘体半导体(SOI)场效应晶体管的源极和/或漏极区域之间形成一个间隙,该间隙最好比耗尽区的厚度薄,该间隙通常围绕偏置在零伏的源极和/或漏极区域,仅在工作模式期间瞬态减小在SOI场效应晶体管中形成的发射极双极晶体管,在该工作模式中,场效应晶体管支配场效应晶体管的正常工作,并且有效基极发射极结电容也瞬态增加。该增益的瞬态减小以及高频响应的瞬态减小与其他技术充分兼容,以比先前实现的更大程度地减小寄生双极电流尖峰,并且还减小了这种电流尖峰。含间隙的晶体管结构应用于绝缘体-半导体-互补金属氧化物半导体(SOICMOS)SRAM,在保持晶体管中的过电荷存储和浮体效应的同时,有效地抑制了半选择记录干扰效应。

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