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Integrated circuit memory device with embedded self-test circuitry with monitor and tester modes
Integrated circuit memory device with embedded self-test circuitry with monitor and tester modes
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机译:具有嵌入式自检电路的集成电路存储设备,具有监控器和测试器模式
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摘要
The integrated circuit memory device 10 of the present invention is provided with a self test monitor mode. The memory device 10 includes a memory array 26 having a plurality of memory cells. The memory device (10) further includes a built-in self-test circuit (12) connected to receive a self-test select signal. This embedded self-test circuit 12 may be operated to generate an internal self-test signal based on the operation and testing of the memory array 26 when the memory device 10 is in the self-test mode. The data buffer 28 is connected to receive an internal self test signal and a monitor mode signal. The data buffer 28 is operable to connect an internal self-test signal to a terminal of the memory device 10 to provide an external self-test signal at the memory device 10 when the memory device 10 is in self-do. The monitored internal self-test signal can be used to verify the operation of the embedded self-test circuit 12. [ The monitored self-test signal can also be used to test other memory devices in test mode.
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