Rounding device for minimizing rounding off error

摘要

The present invention relates to a rounding apparatus for minimizing a round-off error, and more particularly, to a rounding apparatus for rounding low-order n bits with respect to a 2n-bit input value, wherein the low-order bits (n-1) A sticky bit generating means for detecting whether at least one bit having a value of 1 exists for a predetermined number of bits and outputting a sticky bit; An addition bit generating means for receiving the most significant bit of the sticky bit and the lower n bits and logically combining the two values to output a rounding bit depending on whether there is an output value; And adding means for adding the rounding bits output from the addition bit generating means and the value of the least significant bit among the upper n bits and outputting a rounded value.;Accordingly, in the present invention, when the value of the toggle flip-flop is changed and the lower bits become exactly the middle value, the probability of adding 1 to the upper 16 bits is exactly ½, so that rounding off error is reduced depending on the bit 16 .