ROUNDING DEVICE TO MINIMIZE ROUND-OFF ERROR

摘要

The present invention discloses a rounding device for minimizing rounding off errors. The device is a device for rounding a 2n bit input value, and searching for whether there is at least one bit having a value of 1 for the lower (n-1) bits except the most significant bit among the lower n bits. A sticky bit generating means for outputting a sticky bit, a sticky bit generating means for outputting a sticky bit, a signal for toggling in response to an inverse signal of the inverted signal and a value of the most significant bit of the lower n bits, and An add bit generating means for generating the toggled signal in response to a multiplied signal or outputting a value of the most significant bit of the lower n bits as a rounding bit, and a rounding bit output from the adding bit generating means in response to a round enable signal; Upper n-bit data generating means for adding a value of upper n bits to output a value of upper n bits, and the round enable The round disabled in response to the heading consists of a lower n-bit data generation means to output the lower n-bit data to the lower n-bit data. When the most significant bit data of the lower n bit data is 1 and the remaining (n-1) bit data are all 0, the rounding off error can be minimized.