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Multiprocessor system for supporting broadcast multi-addressing and inter-multiprocessor communications
Multiprocessor system for supporting broadcast multi-addressing and inter-multiprocessor communications
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机译:支持广播多址和多处理器间通信的多处理器系统
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摘要
The processor for receiving data packets with address information and data storage in a given area in a store on the basis of the address information, which specifies a register holding an address of the given area. The address information further specifically specifies a fixed area in the store, and more specifically further specifies a direct address in the store.
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