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CAD and simulation system for targeting IC designs to multiple fabrication processes

机译:CAD和仿真系统,用于将IC设计针对多种制造工艺

摘要

Using the present invention, only a single design and development process needs to be conducted for ICs fabricated using a number of different fabrication processes. In one embodiment of this process, the IC is first designed on a CAD system using a generic Cell Based Architecture (CBA) library. This generic CBA library represents several libraries for different process technologies. The resulting generic design is then simulated and verified using best and worst case timing delays and other parameters which are derived from a combination of the various technologies. Hence, only one design need be created and simulated. Generic design rule and parasitic parameters are then used to optimize the placement and routing of the generic design. The post- layout generic design is then simulated and verified using performance characteristics determined by a combination of the technologies. The accepted, generic post-layout design is then ported for each intended fabrication process to create the mask patterns associated with each fabrication process.
机译:使用本发明,对于使用许多不同的制造工艺制造的IC,仅需要执行单一的设计和开发过程。在该过程的一个实施例中,首先使用通用的基于单元的体系结构(CBA)库在CAD系统上设计IC。这个通用的CBA库代表用于不同过程技术的几个库。然后,使用最佳和最坏情况下的定时延迟以及从各种技术的组合中得出的其他参数,对所得的通用设计进行仿真和验证。因此,仅需要创建和仿真一种设计。然后使用通用设计规则和寄生参数来优化通用设计的布局和布线。然后使用由技术组合确定的性能特征对布局后的通用设计进行仿真和验证。然后,将接受的通用布局后设计移植到每个预期的制造工艺中,以创建与每个制造工艺相关的掩模图案。

著录项

  • 公开/公告号US5754826A

    专利类型

  • 公开/公告日1998-05-19

    原文格式PDF

  • 申请/专利权人 SYNOPSYS INC.;

    申请/专利号US19950511172

  • 申请日1995-08-04

  • 分类号H01L21/70;

  • 国家 US

  • 入库时间 2022-08-22 02:39:35

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