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Low power low noise circuit design using half V.sub.dd
Low power low noise circuit design using half V.sub.dd
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机译:采用半Vdd的低功耗低噪声电路设计
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摘要
A power saving technique for digital integrated circuit designs by employing another power supply that is equal to half V.sub.dd. The power supply switching noises can also be reduced by the technique. Also disclosed are the driver design and the pre-charging bus driver design that implement this power-saving technique.
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