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Cost reduced interpolated timing recovery in a sampled amplitude read channel

机译:降低了采样幅度读取通道中的内插时序恢复的成本

摘要

A sampled amplitude read channel reads information stored on a magnetic medium by detecting digital data from a sequence of discrete time interpolated sample values, the interpolated sample values generated by interpolating a sequence of discrete time channel sample values generated by sampling pulses in an analog read signal from a magnetic read head positioned over the magnetic medium. A write VFO generates a write clock for writing digital data to the magnetic medium at a predetermined baud rate for a selected zone, and upon read back, the write VFO generates a sampling clock at a frequency slightly higher than the write frequency. A sampling device samples the analog read signal at the sampling clock rate to generate a sequence of discrete time channel samples that are not synchronized to the baud rate, and the channel samples are equalized by a discrete time equalizing filter according to a predetermined partial response (PR4, EPR4, EEPR4, etc.). An interpolating timing recovery circuit, responsive to the equalized channel samples, computes an interpolation interval &tgr; and, in response thereto, generates interpolated sample values substantially synchronized to the baud rate. The timing recovery circuit also generates a data clock for clocking a discrete time sequence detector which detects the digital data from the interpolated sample values. In a cost reduced implementation, the interpolation filter coefficients are computed in real time as a function of the interpolation interval &tgr;.
机译:采样幅度读取通道通过从离散时间内插采样值序列中检测数字数据来读取存储在磁性介质上的信息,该内插采样值是通过对模拟读取信号中的采样脉冲生成的离散时间通道采样值序列进行内插而生成的来自位于磁介质上方的磁读取头。写入VFO产生用于以选定区域的预定波特率将数字数据写入磁性介质的写入时钟,并且在回读时,写入VFO产生采样时钟,其频率略高于写入频率。采样设备以采样时钟速率对模拟读取信号进行采样,以生成一系列与波特率不同步的离散时间通道采样,然后通过离散时间均衡滤波器根据预定的部分响应对通道采样进行均衡( PR4,EPR4,EEPR4等)。插值定时恢复电路响应于均衡的信道采样,计算插值间隔&tgr。响应于此,产生基本与波特率同步的内插样本值。定时恢复电路还产生用于为离散时序检测器计时的数据时钟,该离散时序检测器从内插采样值中检测数字数据。在降低成本的实施方式中,根据插值间隔&tgr实时计算插值滤波器系数。

著录项

  • 公开/公告号US5760984A

    专利类型

  • 公开/公告日1998-06-02

    原文格式PDF

  • 申请/专利权人 CIRRUS LOGIC INC.;

    申请/专利号US19950546162

  • 发明设计人 MARK S. SPURBECK;RICHARD T. BEHRENS;

    申请日1995-10-20

  • 分类号G11B5/09;

  • 国家 US

  • 入库时间 2022-08-22 02:39:28

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