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Processor and method for executing a branch instruction and an associated target instruction utilizing a single instruction fetch
Processor and method for executing a branch instruction and an associated target instruction utilizing a single instruction fetch
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机译:利用单个指令提取来执行分支指令和相关目标指令的处理器和方法
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摘要
A processor and method of executing instructions within a processor are disclosed, which permit both a branch instruction and a target instruction of the branch instruction to be executed in response to a single instruction fetch. In accordance with an illustrative embodiment, the processor, which has an associated memory, simultaneously fetches a plurality of instructions from the memory. Branch instructions among the plurality of instructions are then detected. In response to a detection of a branch instruction among the plurality of instructions, a determination is made whether a target instruction to be executed in response to execution of the branch instruction is one of the plurality of instructions. In response to a determination that the target instruction is one of the plurality of instructions, the processor executes the target instruction without making an additional instruction fetch.
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