首页>
外国专利>
Low cost writethrough cache coherency apparatus and method for computer systems without a cache suppporting bus
Low cost writethrough cache coherency apparatus and method for computer systems without a cache suppporting bus
展开▼
机译:无需高速缓存支持总线的用于计算机系统的低成本直写高速缓存一致性设备和方法
展开▼
页面导航
摘要
著录项
相似文献
摘要
A method for supporting a writethrough cache in a computer system not otherwise supporting cache is disclosed. Cache coherency is guaranteed by a cache coherency module detecting the CPU programming a DMA controller to allow a device other than the CPU to transfer data to main memory and, until the data transfer is concluded, flushing the cache each time the CPU reads an address other than an address of a standard computer system component. The cache is also flushed upon conclusion of the data transfer. In computer systems including a bus master device, the cache is flushed whenever the cache coherency module detects the CPU reading an address other than an address of a standard computer system component and whenever the cache coherency module detects an interrupt other than a standard computer system interrupt. Also disclosed a method to automatically determine the range of cacheable addresses in the computer system and to turn on the cache after the computer system is reset.
展开▼