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Emulating a delayed exception on a digital computer having a corresponding precise exception mechanism

机译:在具有相应精确异常机制的数字计算机上模拟延迟异常

摘要

A digital computer system comprises a precise exception handling processor and a control subsystem. The precise exception handling processor performs processing operations under control of instructions. The precise exception handling processor is constructed in accordance with a precise exception handling model, in which, if an exception condition is detected in connection with an instruction, the exception condition is processed in connection with the instruction. The precise exception handling processor further includes a pending exception indicator having a pending exception indication state and a no pending exception indication state. The control subsystem provides a series of instructions to the precise exception handling processor to facilitate emulation of at least one emulated program instruction. The emulated program instruction is constructed to be processed by a delayed exception handling processor which is constructed in accordance with a delayed exception handling model, in which if an exception is detected during processing of an instruction, the exception condition is processed in connection with a subsequent instruction. The series of instructions provided by the control subsystem in emulation of the emulated program instruction controls the precise exception handling processor toP P(i) determine whether the pending exception indicator is in the pending exception indication state and, if so, to invoke a routine to process the pending exception and condition the pending exception indicator to the no pending exception indication statePP (ii) perform processing operations in accordance with the emulated processing instruction; andPP(iii) if an exception condition is detected during the processing operations, to invoke an exception handler in accordance with the processor's precise exception handling model to condition the pending exception indicator to the pending exception indication state, so that the exception condition will be processed during processing operations for a subsequent emulated program instruction.
机译:数字计算机系统包括精确的异常处理处理器和控制子系统。精确异常处理处理器在指令的控制下执行处理操作。精确异常处理处理器根据精确异常处理模型构造,其中,如果结合指令检测到异常条件,则结合指令处理异常条件。精确异常处理处理器还包括具有未决异常指示状态和未决异常指示状态的未决异常指示符。控制子系统向精确的异常处理处理器提供一系列指令,以促进对至少一个模拟程序指令的模拟。模拟程序指令被构造为由延迟异常处理处理器处理,该延迟异常处理处理器根据延迟异常处理模型构造,其中,如果在指令处理期间检测到异常,则结合随后的指令来处理异常条件。指令。由控制子系统在仿真程序指令的仿真中提供的一系列指令控制精确的异常处理处理器,以

(i)确定未决异常指示符是否处于未决异常指示状态,如果是,则调用例程以处理未决异常并将未决异常指示符调整为无未决异常指示状态

(ii)根据模拟处理指令执行处理操作; (iii)如果在处理操作期间检测到异常条件,则根据处理器的精确异常处理模型来调用异常处理程序,以将未决异常指示符调节为未决异常指示状态,以便异常条件将在后续的模拟程序指令的处理操作期间进行处理。

著录项

  • 公开/公告号US5778211A

    专利类型

  • 公开/公告日1998-07-07

    原文格式PDF

  • 申请/专利权人 SUN MICROSYSTEMS INC.;

    申请/专利号US19960602158

  • 发明设计人 PAUL H. HOHENSEE;DAVID DICE;

    申请日1996-02-15

  • 分类号G06F9/00;G06F9/46;

  • 国家 US

  • 入库时间 2022-08-22 02:39:08

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