Bias circuit having process variation compensation and power supply variation compensation

摘要

Bias networks for producing a predetermined bias current for another circuit are provided. The bias networks include compensation subcircuits which provide compensation for process variations in the transistors in the network. Circuit implementations which allow for compensation for power supply voltage variations are also provided. The bias networks include a biasing transistor and a corresponding compensation transistor on the same chip which compensation transistor will have substantially the same process variations as the biasing transistor. The compensation transistor is interposed at a node in a control path and draws current at the node such that a change in the current drawn by the compensation transistor causes a change in the input voltage of the biasing transistor to thereby adjust the bias current produced by the transistor to maintain the bias current within design specifications despite process variations. Bias circuit configurations for a cascode amplifier, a differential amplifier, and a current mirror are provided.