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Transmission line driver having controllable rise and fall times with variable output low and minimal on/off delay

机译:传输线驱动器,上升和下降时间可控,输出可变低,开/关延迟最小

摘要

A driver for providing binary signals from a data system to a transmission line includes a data input node and an output transistor coupled between a data output node and ground. The output transistor has a gate, a source and a corresponding gate-source voltage therebetween. A first transistor is coupled to the gate of the output transistor and is responsive to signals applied to the input node. It conducts a discharge current from the gate of the output transistor for discharging the gate of the output transistor to reduce its gate-source voltage. A clamping circuit clamps the gate-source voltage of the output transistor to a first voltage level above ground to prevent the discharge current from reducing the, gate-source voltage of the output transistor to ground. In another embodiment, a supply voltage dependent current source adjusts a gate voltage of a second transistor in response to an increase in the supply voltage so that an initial charging current is maintained at a relatively constant level in response to increases in the supply voltage. A method of reducing a turn-on delay of an output transistor of a transmission line driver is also disclosed.
机译:用于从数据系统向传输线提供二进制信号的驱动器包括数据输入节点和耦合在数据输出节点与地之间的输出晶体管。输出晶体管之间具有栅极,源极和对应的栅极-源极电压。第一晶体管耦合到输出晶体管的栅极,并且响应于施加到输入节点的信号。它从输出晶体管的栅极传导放电电流,以使输出晶体管的栅极放电,以降低其栅极-源极电压。钳位电路将输出晶体管的栅极-源极电压钳位至高于地的第一电压电平,以防止放电电流将输出晶体管的栅极-源极电压降低至地。在另一个实施例中,依赖于电源电压的电流源响应于电源电压的增加来调节第二晶体管的栅极电压,从而响应于电源电压的增加将初始充电电流维持在相对恒定的水平。还公开了一种减小传输线驱动器的输出晶体管的导通延迟的方法。

著录项

  • 公开/公告号US5818260A

    专利类型

  • 公开/公告日1998-10-06

    原文格式PDF

  • 申请/专利权人 NATIONAL SEMICONDUCTOR CORPORATION;

    申请/专利号US19960639921

  • 发明设计人 JAMES R. KUO;

    申请日1996-04-24

  • 分类号H03K19/0185;H03K19/017;

  • 国家 US

  • 入库时间 2022-08-22 02:38:29

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