首页> 外国专利> Fast turn-on silicon controlled rectifier (SCR) for electrostatic discharge (ESD) protection

Fast turn-on silicon controlled rectifier (SCR) for electrostatic discharge (ESD) protection

机译:快速导通的可控硅整流器(SCR),用于静电放电(ESD)保护

摘要

An apparatus for protecting an integrated circuit against damage from electrostatic discharge (ESD) includes an ESD bus that is connected to multiple input pads through a respective diode. The ESD bus-- the node to be protected--is coupled to the negative power supply bus (V. sub.ss) by a FET-triggered SCR circuit. In particular, the SCR circuit includes, equivalently, a PNP bipolar transistor, and an NPN bipolar transistor interconnected so that each transistor receives base current from the collector terminal of the other. A field effect transistor (FET) is configured to trigger the SCR into conduction, to thereby provide a low- impedance path to safely shunt ESD charge. The drain terminal of the FET is connected to an intermediate node of a resistance between the ESD bus, and the PNP emitter terminal. ESD charge on an input pad of the integrated circuit forward biases the respective diodes, and charges the ESD bus. When the voltage on the ESD bus reaches a predetermined threshold voltage, the FET drain region breaks down, and triggers the SCR circuit into conduction to shunt the charge on the ESD bus to V.sub. ss. The voltage drop occasioned by current flowing from the ESD bus to the intermediate node at the onset of the FET drain breakdown hastens the turn-on of the SCR, thus improving the response time for handling fast ESD events, such as those in accordance with the Charged Device Model (CDM).
机译:一种用于保护集成电路免受静电放电(ESD)损坏的设备,该设备包括ESD总线,该ESD总线通过相应的二极管连接到多个输入焊盘。 ESD总线(要保护的节点)通过FET触发的SCR电路耦合到负电源总线(V.sub.ss)。特别地,SCR电路等效地包括互连的PNP双极晶体管和NPN双极晶体管,使得每个晶体管从另一个的集电极端子接收基极电流。场效应晶体管(FET)配置为触发SCR导通,从而提供低阻抗路径以安全地分流ESD电荷。 FET的漏极端子连接到ESD总线和PNP发射极之间的电阻的中间节点。集成电路输入焊盘上的ESD电荷正向偏置各个二极管,并对ESD总线充电。当ESD总线上的电压达到预定阈值电压时,FET漏极区域击穿,并触发SCR电路导通,以将ESD总线上的电荷分流至V。 ss。在FET漏极击穿开始时从ESD总线流向中间节点的电流引起的电压降会加快SCR的导通速度,从而缩短了处理快速ESD事件(例如根据ESD发生的事件)的响应时间。收费设备模型(CDM)。

著录项

  • 公开/公告号US5825600A

    专利类型

  • 公开/公告日1998-10-20

    原文格式PDF

  • 申请/专利权人 CYPRESS SEMICONDUCTOR CORP.;

    申请/专利号US19970845302

  • 发明设计人 JEFFREY WATT;

    申请日1997-04-25

  • 分类号H02H3/22;

  • 国家 US

  • 入库时间 2022-08-22 02:38:22

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号