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Manner and the device which control the burst access sequence in the alignment and the toggle mode which use the toggle mode increment logic circuit

机译:使用触发模式增量逻辑电路的方式和控制对准和触发模式中的突发访问序列的方式和装置

摘要

(57) Abstract Using the toggle mode automatic increment logic circuit, the memory access control logic circuit which controls the burst access of sequential mode and toggle mode to the memory in the computer & the system. The memory access control logic circuit of this invention controls the sequence which accesses the memory place at the time of memory burst access manipulation, this burst access sequence is decided burst access start address by the sequence which increment is done. In the computer which use the memory access control logic circuit of this invention & the system which, the toggle increment logic circuit which increment is done is installed start address with the toggle sequence. The entry bus, from the device inside the computer & the system, burst access request, responding to burst access request, it receives with the burst access start address which shows the 1st memory place which is accessed. It judges another logic circuit, the device has needed either the linear increment sequence and the toggle increment sequence for burst access. Responding to the judgment that, the 1st device has needed the linear increment sequence, the control logic circuit controlling the toggle increment logic circuit, increment it does start address with the linear sequence.
机译:(57)<摘要>使用切换模式自动递增逻辑电路,内存访问控制逻辑电路控制顺序模式和切换模式对计算机和系统内存的突发访问。本发明的存储器访问控制逻辑电路控制在进行存储器突发访问操作时访问存储器位置的顺序,该突发访问顺序由进行递增的顺序决定突发访问起始地址。在使用本发明的存储器访问控制逻辑电路及系统的计算机中,以触发序列设置开始地址,该增量完成的触发增量逻辑电路被设置为起始地址。入口总线,来自计算机和系统内部的设备,突发访问请求,响应突发访问请求,它接收带有突发访问起始地址的地址,该地址显示了被访问的第一个存储位置。它判断另一个逻辑电路,设备需要线性增量序列和触发增量序列来进行突发访问。响应于判断,第一个器件需要线性递增序列,控制逻辑电路控制触发递增逻辑电路,以线性序列递增其起始地址。

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