首页> 外国专利> CIRCUIT ARCHITECTURE FOR PROCESSING MULTI-CHANNEL FRAME OF SYNCHRONIZING DIGITAL SIGNAL WITH WIDE FREQUENCY BAND ESPECIALLY FOR SONET/SDH SPECIFICATION

CIRCUIT ARCHITECTURE FOR PROCESSING MULTI-CHANNEL FRAME OF SYNCHRONIZING DIGITAL SIGNAL WITH WIDE FREQUENCY BAND ESPECIALLY FOR SONET/SDH SPECIFICATION

机译:专门用于SONET / SDH规范的具有宽频带同步数字信号多通道帧处理的电路体系结构

摘要

PROBLEM TO BE SOLVED: To reduce the number and size of circuit components, and to reduce costs or the like by constituting this circuit architecture for processing a frame constituted of a single channel, and constituting this circuit architecture of module type components which can be connected in a module type with N pieces of same components corresponding to the number of frame channels. ;SOLUTION: A circuit architecture 1 for performing a synchronizing signal frame processing with a wide frequency band in an SONET/SDH specification can be mounted as a single electronic circuit architecture integrated into a semiconductor, and this is composed of N pieces of same components 2. Each components 2 processes a frame constituted of a single channel. Each component 2 connected in parallel is composed of an inputting part 3, outputting part 4, and inside block 5 for providing a receiving function and a transmitting function.;COPYRIGHT: (C)1999,JPO
机译:解决的问题:通过构成用于处理由单个通道构成的帧的该电路架构,并且构成该电路架构的可连接的模块型组件,以减少电路组件的数量和尺寸,并降低成本等。在模块类型中,具有与帧通道数相对应的N个相同组件。 ;解决方案:可以将SONET / SDH规范中用于在宽频带上执行同步信号帧处理的电路体系结构1安装为集成到半导体中的单个电子电路体系结构,它由N个相同的组件组成2每个组件2处理由单个通道构成的帧。并联连接的每个组件2由输入部分3,输出部分4和内部块5组成,用于提供接收功能和发送功能。版权所有:(C)1999,JPO

著录项

  • 公开/公告号JPH1174858A

    专利类型

  • 公开/公告日1999-03-16

    原文格式PDF

  • 申请/专利权人 SGS THOMSON MICROELETTRONICA SPA;

    申请/专利号JP19980181142

  • 发明设计人 VEGGETTI ANDREA;DELLORO ANNALISA;

    申请日1998-06-26

  • 分类号H04J3/00;H04J3/16;

  • 国家 JP

  • 入库时间 2022-08-22 02:34:49

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