ASYNCHRONOUS DIGITAL SYSTEM, ASYNCHRONOUS DATA PASS CIRCUIT ASYNCHRONOUS DIGITAL SIGNAL PROCESSING CIRCUIT, AND ASYNCHRONOUS DIGITAL SIGNAL PROCESSING METHOD

摘要

PROBLEM TO BE SOLVED: To improve processing speed while securing high reliability. ;SOLUTION: The whole chip is divided into plural blocks each of which has a prescribed area, a connection part between respective blocks is formed by applying a delay insensitive(DI) model or a quasi delay insensitive(QDI) model and each block is formed by applying a scalable delay insensitive(SDI) model. The system is constituted of a circuit constitution element having a delay estimated at the time of its design so as to form k.Tab Tac between time Tab from the generation of signal transition (a) to be a common cause up to the generation of the signal transition (b) and time Tac from the generation of the signal transition (a) up to the generation of the signal transition (c) when specification that the signal transition (b) of a partial circuit 7 is generated prior to the signal transition (c) of a partial circuit 8 is defined in the SDI model. Where (k) is a constant and is defined as a real number larger than '1'.;COPYRIGHT: (C)1999,JPO