首页> 外国专利> METHOD FOR DESIGNING MICROPROCESSOR SOFTWARE CORE WITH VARIABLE HARDWARE SCALE

METHOD FOR DESIGNING MICROPROCESSOR SOFTWARE CORE WITH VARIABLE HARDWARE SCALE

机译:具有可变硬件规模的微处理软件内核的设计方法

摘要

PROBLEM TO BE SOLVED: To eliminate H/W blocks which are unnecessary for software(S/W) processing for a microprocessor (μP) by determining a hardware(H/W) subelement obtained and determining a scale when the total time needed to execute decomposed microcodes is equal to or shorter than a software(S/W) process upper-limit time. ;SOLUTION: The clock period of a μP software core is given as information (step S3) and the execution processing time obtained from the number of S/W program processing steps is compared with a system request performance (step S5). When the processing tine has margin for system request performance, a microcode which performs other equivalent processes using no exclusive H/W block is substituted for (step S6). A system processing time, on the other hand, is calculated (step S14) and compared with a system processing restriction time (step S15). When the system processing restriction time is not exceeded and the processing can be performed, a multiplier is unnecessary finally and the area reduction of the μP software core is determined (step S17).;COPYRIGHT: (C)1998,JPO
机译:解决的问题:通过确定获得的硬件(H / W)子元素并确定执行所需的总时间时的标度,消除对微处理器(μP)的软件(S / W)处理不必要的H / W块分解后的微码等于或短于软件(S / W)处理上限时间。 ;解决方案:将μP软件内核的时钟周期作为信息提供(步骤S3),并将从S / W程序处理步骤数获得的执行处理时间与系统请求性能进行比较(步骤S5)。当处理例程具有用于系统请求执行的余量时,不使用排他的H / W块而执行其他等效处理的微码被替换(步骤S6)。另一方面,计算系统处理时间(步骤S14),并将其与系统处理限制时间进行比较(步骤S15)。当不超过系统处理限制时间并且可以执行处理时,最终不需要乘法器,并确定μP软件核的面积减小(步骤S17)。;版权所有:(C)1998,JPO

著录项

  • 公开/公告号JPH10326291A

    专利类型

  • 公开/公告日1998-12-08

    原文格式PDF

  • 申请/专利权人 MITSUBISHI ELECTRIC CORP;

    申请/专利号JP19970133133

  • 发明设计人 OTSUJI AKIO;

    申请日1997-05-23

  • 分类号G06F17/50;

  • 国家 JP

  • 入库时间 2022-08-22 02:30:13

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