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The flash die analog which possesses single unit latch - the acceleration device for the digital converter

机译:具有单个单元锁存器的Flash芯片模拟-数字转换器的加速装置

摘要

There is disclosed a high-speed decoding apparatus for use in a flash-type analog-to-digital converter. The apparatus disclosed employs an OR gate (70) which follows an AND gate (53) and which AND gate is conventionally employed in a comparator associated with such a converter. The OR gate functions to block any dynamic movement of the unknown input voltage from being transferred to the decode lines of the analog-to-digital converter. To further gain speed and autozeroed inverters (74 and 75; 77 and 78) are coupled to the output of the OR gate to further assure that the decoder lines are rapidly driven to therefore gain an extra advantage in high-speed operation of the converter employing the apparatus as described.
机译:公开了一种用于闪存型模数转换器的高速解码设备。所公开的设备采用在“与”门(53)之后的“或”门(70),并且该“与”门通常用于与这种转换器相关的比较器中。或门的功能是阻止未知输入电压的任何动态运动转移到模数转换器的解码线。为了进一步提高速度,自动归零的反相器(74和75; 77和78)耦合到“或”门的输出,以进一步确保解码器线被快速驱动,从而在采用该转换器的高速操作中获得额外的优势。所描述的设备。

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