首页> 外国专利> Apparatus and method for implementing a bank interlock scheme and related test mode for multi-bank memory devices

Apparatus and method for implementing a bank interlock scheme and related test mode for multi-bank memory devices

机译:用于实现多存储体存储装置的存储体互锁方案和相关测试模式的设备和方法

摘要

Testing of a multibank memory device having a plurality of memory banks which includes activating two or more of the plurality of memory banks for participation in the test; selecting at least one common memory address corresponding to a memory cell within each activated bank; simultaneously writing test data into the selected memory cell of each activated bank;simultaneously reading the test data previously written into the selected memory cell of each activated bank; and comparing the test data read from each activated bank with the test data from each other activated bank and if a match is determined to exist, then indicating a pass condition, else indicating a fail condition.
机译:对具有多个存储体的多存储体存储设备进行测试,包括激活多个存储体中的两个或多个以参与测试;选择与每个激活的存储体中的存储单元相对应的至少一个公共存储地址;同时将测试数据写入每个激活存储区的选定存储单元中;同时读取先前写入每个激活存储区的选定存储单元中的测试数据;比较从每个激活的存储体读取的测试数据与每个其他激活的存储体的测试数据,如果确定存在匹配,则指示通过条件,否则指示失败条件。

著录项

  • 公开/公告号EP0907184A2

    专利类型

  • 公开/公告日1999-04-07

    原文格式PDF

  • 申请/专利权人 SIEMENS AKTIENGESELLSCHAFT;

    申请/专利号EP19980115819

  • 发明设计人 KRAUSE GUNNAR H.;KIEHL OLIVER;

    申请日1998-08-21

  • 分类号G11C29/00;

  • 国家 EP

  • 入库时间 2022-08-22 02:19:16

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