首页> 外国专利> Programmable gain control amplifier with multi-stage structure including analog / digital converter and its gain error correction method

Programmable gain control amplifier with multi-stage structure including analog / digital converter and its gain error correction method

机译:具有模拟/数字转换器的多级结构的可编程增益控制放大器及其增益误差校正方法

摘要

The present invention relates to a programmable multi-stage gain control amplifier including an analog-to-digital converter and a gain error correction method according thereto, comprising: a memory for storing a predetermined correction value; It has a normal operation and a correction operation mode, and in the correction operation mode to cut off the external input voltage (v in ) and the external gain control bit, output a specific voltage and a gain control code to be internally corrected, and corresponding correction Gain control and correction means for controlling a value to be stored in a corresponding address of the memory, and in the normal mode, inputting an external input voltage and a gain control bit applied externally to read a correction value stored in the corresponding address of the memory. ; First sub gain means for determining an external input voltage by a gain control code output from the gain control and correction means; First analog / digital conversion means for inputting and quantizing the analog gain amplified by the first sub gain means; The input voltage is delayed for a predetermined time, the first voltage V A obtained by the analog voltage V IN1 amplified by the first sub gain means and the quantized voltage D IN , and the delay voltage V. Gain means for adding and outputting the second voltage V B obtained by the gain voltage or the ground voltage of 1N2 ), and converting the output analog voltage into digital output; And digitally correcting a gain error by inputting a voltage output from the first analog / digital converting means and the gain means to generate an N-bit output value, and subtracting a correction value stored in the memory from the generated N-bit output value. Means;;Therefore, according to the present invention, by implementing the two functions of the PGA and ADC at the same time, the area and power consumption can be minimized compared to the case of designing the two blocks independently, and the gain of the linear final output stage can be improved by correcting the gain error. It has an effect that can be obtained.
机译:可编程多级增益控制放大器技术领域本发明涉及一种包括模数转换器的可编程多级增益控制放大器及其增益误差校正方法。它具有正常操作和校正操作模式,在校正操作模式下,它会切断外部输入电压(v in )和外部增益控制位,输出特定电压和增益控制内部校正的代码,以及相应的校正增益控制和校正装置,用于控制要存储在存储器的相应地址中的值,并且在正常模式下,输入外部输入电压和从外部施加的增益控制位以读取校正值存储在存储器的相应地址中。 ;第一子增益装置,用于通过从增益控制和校正装置输出的增益控制码确定外部输入电压;第一模拟/数字转换装置,用于输入和量化由第一子增益装置放大的模拟增益;输入电压被延迟预定时间,第一电压V A 由通过第一子增益装置放大的模拟电压V IN1 获得,而量化电压D IN ,以及延迟电压V。增益表示将通过 1N2 的增益电压或接地电压获得的第二电压V B 相加并输出) ,并将输出的模拟电压转换为数字输出;并且,通过输入从第一模拟/数字转换装置和增益装置输出的电压以产生N位输出值,并且从所产生的N位输出值中减去存储在存储器中的校正值,来数字地校正增益误差。因此,根据本发明,与同时设计两个模块的情况相比,通过同时实现PGA和ADC的两个功能,可以使面积和功耗最小化。通过校正增益误差,可以改善线性最终输出级。它具有可以获得的效果。

著录项

  • 公开/公告号KR19990016226A

    专利类型

  • 公开/公告日1999-03-05

    原文格式PDF

  • 申请/专利权人 윤종용;

    申请/专利号KR19970038699

  • 发明设计人 안길초;조율호;

    申请日1997-08-13

  • 分类号H03G3/20;

  • 国家 KR

  • 入库时间 2022-08-22 02:17:49

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