L1, L2, and L3 bit processing apparatus and processing method of low path overhead in communication by synchronous transmission method

摘要

The present invention relates to a L1, L2 and L3 bit processing apparatus and processing method of the low path overhead in the communication by the synchronous transmission method, the L1, L2 and L3 bit processing apparatus of the low path overhead is a low path overhead Bits 5, 6, and 7 of the low path overhead input from the low path overhead input unit and low path overhead input unit for extracting and outputting bits 5, 6, and 7 by inputting a logic value of 8 bits. Memory devices for storing the output values of a "0" detector, a "10" detector, and a "1" detector, and a "0" detector, a "10" detector, and a "1" detector for receiving the logic values of the bits , And the "mismatch" decision unit which outputs different logic values when the output values of the memory elements are the same and when they are not the same, and the L1, L2, and L3 bit processing methods of the low path overhead have a low path overhead signal. Enter In step S, the logic values of the 5th, 6th, and 7th bits of the received low path overhead are judged to be unequip state if the sequence is " 0 ", and " 10 " If it is "1", it is determined as a passing signal, but otherwise, it is determined as a mismatch state.