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THREE-DIMENSIONAL MULTI-CHIP MODULE HAVING STACKED SEMICONDUCTOR CHIPS AND PROCESS OF FABRICATION THEREOF

机译:具有叠层半导体芯片的三维多芯片模块及其制造工艺

摘要

The plurality of semiconductor chips 21a to 21d are sequentially coupled to each other to form a stacked semiconductor chip structure 21, the stacked semiconductor chip structure being received in a cavity formed in the insulating carrier 22; The semiconductor chips 21a to 21d are sequentially stacked, and the conductive pattern 22c formed on the lower surface of the insulating carrier is connected to the electrodes 21h / 21i of each of the semiconductor chips through the coupling wires 23, and 3 Dimensional multi-chip modules are slightly higher than stacked semiconductor chip structures.
机译:多个半导体芯片21a至21d顺序地彼此耦合以形成堆叠的半导体芯片结构21,该堆叠的半导体芯片结构被容纳在绝缘载体22中形成的腔中;顺序地堆叠半导体芯片21a至21d,并且形成在绝缘载体的下表面上的导电图案22c通过耦合线23和3维多芯片连接到每个半导体芯片的电极21h / 21i。模块比堆叠的半导体芯片结构略高。

著录项

  • 公开/公告号KR0180451B1

    专利类型

  • 公开/公告日1999-04-15

    原文格式PDF

  • 申请/专利权人 NEC CORP.;

    申请/专利号KR19960010373

  • 发明设计人 센바 나오지;시마다 유조;

    申请日1996-04-06

  • 分类号H01L21/60;

  • 国家 KR

  • 入库时间 2022-08-22 02:16:13

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