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Viterbi decoder, method for controlling the slip status of a recurrence code in a Viterbi decoder and slip status controller

机译:维特比解码器,在维特比解码器中控制重复代码的转差状态的方法和转差状态控制器

摘要

In a Viterbi decoder a bit synchronizing control circuit (10) is activated or deactivated by an external control signal ST. On receipt of a decoder error number (residual error number) ERROR from an N-bit counter (28) the bit synchronizing circuit (10) gives a SLIP-REQUEST signal to a conversion circuit (21) to change or fix a slip condition and a reset signal SR to the N-bit counter to initialise the counter. The remaining components of the block diagram are the same as for a conventional Viterbi decoder
机译:在维特比解码器中,比特同步控制电路(10)由外部控制信号ST激活或去激活。当从N位计数器(28)接收到解码器错误号(残留错误号)ERROR时,位同步电路(10)将SLIP-REQUEST信号提供给转换电路(21),以改变或固定滑动条件,并且重置信号SR到N位计数器以初始化计数器。框图的其余部分与传统的维特比解码器相同

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