首页> 外国专利> Clamping system and method for clamping floating point color values from a geometry accelerator in a computer graphics system

Clamping system and method for clamping floating point color values from a geometry accelerator in a computer graphics system

机译:用于从计算机图形系统中的几何加速器中夹紧浮点颜色值的夹紧系统和方法

摘要

A clamping system is designed to clamp floating point values from a geometry accelerator in a computer graphics system. The clamping system includes a register configured to receive the floating point value from a connection from the geometry accelerator in the graphics system. Logic associated with the register is configured to determine when the value is less than or equal to a first threshold value (preferably, 0), greater than or equal to a second threshold value (preferably, 1), and between the first and second threshold values. An output mechanism is controlled by the logic. In the preferred embodiment, the output mechanism is a multiplexer interconnected with a tristate driver. The output mechanism is configured to output onto the connection the first threshold value when the color value is less than or equal to the first threshold value, to output onto the connection the second threshold value when the color value is greater than or equal to the second threshold value, and to output onto the connection the originally received floating point value when the floating point value is between the first and second threshold values. An absolute value logic mechanism is associated with the clamping system. The absolute value logic mechanism is configured to force a sign bit of the value that is output by the output mechanism to exhibit a positive state so that the absolute value of an incoming floating point value can be accomplished.
机译:夹紧系统设计用于从计算机图形系统中的几何加速器中夹紧浮点值。钳位系统包括寄存器,该寄存器被配置为从来自图形系统中的几何加速器的连接接收浮点值。与寄存器相关联的逻辑被配置为确定该值何时小于或等于第一阈值(优选为0),大于或等于第二阈值(优选为1)以及在第一阈值和第二阈值之间价值观。输出机制由逻辑控制。在优选实施例中,输出机构是与三态驱动器互连的多路复用器。输出机构被配置为:当颜色值小于或等于第一阈值时,将第一阈值输出到连接上;当颜色值大于或等于第二阈值时,将第二阈值输出到连接上。阈值,并且当浮点值在第一和第二阈值之间时,将原始接收的浮点值输出到连接上。绝对值逻辑机制与夹紧系统关联。绝对值逻辑机制被配置为强制由输出机制输出的值的符号位呈现正状态,从而可以实现输入浮点值的绝对值。

著录项

  • 公开/公告号US5856831A

    专利类型

  • 公开/公告日1999-01-05

    原文格式PDF

  • 申请/专利权人 HEWLETT-PACKARD COMPANY;

    申请/专利号US19960662094

  • 发明设计人 NOEL D. SCOTT;JOHN R. PESSETTO;

    申请日1996-06-12

  • 分类号G06F15/16;

  • 国家 US

  • 入库时间 2022-08-22 02:08:57

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