首页> 外国专利> Process for making group IV semiconductor substrate treated with one or more group IV elements to form barrier region capable of inhibiting migration of dopant materials in substrate

Process for making group IV semiconductor substrate treated with one or more group IV elements to form barrier region capable of inhibiting migration of dopant materials in substrate

机译:制备用一种或多种Ⅳ族元素处理的Ⅳ族半导体衬底以形成能够抑制衬底中掺杂剂材料迁移的势垒区的方法

摘要

Formation of a barrier region in a single crystal group IV semiconductor substrate at a predetermined spacing from a doped region in the substrate is described to prevent or inhibit migration of dopant materials from an adjacent doped region through the barrier region. By implantation of group IV materials into a semiconductor substrate to a predetermined depth in excess of the depth of a doped region, a barrier region can be created in the semiconductor to prevent migration of the dopants from the doped region through the barrier region. The treatment of the single crystal substrate with the group IV material is carried out at a dosage and energy level sufficient to provide such a barrier region in the semiconductor substrate, but insufficient to result in amorphization (destruction) of the single crystal lattice of the semiconductor substrate.
机译:描述了在单晶IV族半导体衬底中与衬底中的掺杂区以预定间隔形成势垒区,以防止或抑制掺杂剂材料从相邻的掺杂区通过势垒区迁移。通过将IV族材料注入到半导体衬底中超过掺杂区深度的预定深度,可以在半导体中形成阻挡区,以防止掺杂剂从掺杂区通过阻挡区迁移。用IV族材料对单晶衬底进行处理的剂量和能级足以在半导体衬底中提供这样的势垒区域,但不足以导致半导体的单晶晶格非晶化(破坏)。基质。

著录项

  • 公开/公告号US5858864A

    专利类型

  • 公开/公告日1999-01-12

    原文格式PDF

  • 申请/专利权人 LSI LOGIC CORPORATION;

    申请/专利号US19970939350

  • 发明设计人 JAMES KIMBALL;SHELDON ARONOWITZ;

    申请日1997-09-29

  • 分类号H01L21/265;

  • 国家 US

  • 入库时间 2022-08-22 02:08:57

相似文献

  • 专利
  • 外文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号