Method for maintaining memory coherency in a computer system having a cache utilizing snoop address injection during a read transaction by a dual memory bus controller

摘要

A method for maintaining memory coherency in a data processing system is disclosed. The data processing system includes a memory system having a dual bus memory controller, which is coupled to a first bus through a first bus master and a second bus coupled to a second bus master. The method maintains memory coherency by snooping across either the first or second bus for attributes on an address/data multiplex bus in the data processing unit. To determine when a snoop operation is required, the system begins by requesting access to either of the two buses through the dual bus memory controller. Once the control of the bus has been granted upon request data is transferred using the master bus controller. It is upon the receipt of an invalid data signal while transferring data across the bus that the snoop activity begins. The snoop is injected only after an invalid data signal is received and a last snoop injection can occur only before a last read data is read.