Endurance testing system for an EEPROM

摘要

An endurance testing system for an EEPROM mainly includes a microprocessor, an interface circuit, a high power pulse generator and a write/erase control and VT test circuit for automatically performing erase/write operations as many times as desired and displaying the variation of the difference between the threshold voltages respectively after the erase and the write operations so that the endurance of the EEPROM can be efficiently and correctly tested.