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Hierarchical routing method to be implemented in a layout system for a semiconductor integrated circuit and medium on which the hierarchical routing program is stored
Hierarchical routing method to be implemented in a layout system for a semiconductor integrated circuit and medium on which the hierarchical routing program is stored
A hierarchical routing method is implemented in a layout system for a semiconductor integrated circuit which has a repetitive circuit portion. The hierarchical routing method lays out circuit elements for the repetitive circuit portion with the repetitive circuit portion structured hierarchically, expands the layout for the hierarchically- structured repetitive circuit portion in a separate independent database, extracts information of connections from the expanded layout for the repetitive circuit portion, and then carries out routing. Therefore, a semiconductor integrated circuit having a repetitive circuit portion can be designed in a short period of time while excellent properties are ensured for the semiconductor integrated circuit.
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