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Computer address translation using fast address generator during a segmentation operation performed on a virtual address
Computer address translation using fast address generator during a segmentation operation performed on a virtual address
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机译:在虚拟地址上执行分段操作期间,使用快速地址生成器进行计算机地址转换
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摘要
An improved address translation method and mechanism for memory management in a computer system is disclosed. A segmentation mechanism employing segment registers maps virtual addresses into a linear address space. A paging mechanism optionally maps linear addresses into physical or real addresses. Independent protection of address spaces is provided at each level. Information about the state of real memory pages is kept in segment registers or a segment register cache potentially enabling real memory access to occur simultaneously with address calculation, thereby increasing performance of the computer system.
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