LOGIC SIMULATION DEVICE, ACCELERATING METHOD FOR LOGIC VERIFICATION TO BE USED FOR THE SAME AND STORAGE MEDIUM RECORDING CONTROL PROGRAM THEREFOR

摘要

PROBLEM TO BE SOLVED: To provide an accelerating method for logic verification capable of avoiding the repetition of unwanted simulation without manually preparing a simulation vector or software again. SOLUTION: A simulation model 1 of a simulator 4 performs the simulation of software by operating a main routine. A tracer 2 traces the operation of main routine due to the simulation model 1 and when the repetition of the same routine is detected, the substitution of that routine is instructed to an agent 3. That agent 3 substitutively executes that routine and dispatches the result to the simulation model 1.