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LSI DESIGNING TECHNIQUE FOR PACKAGING INSPECTION
LSI DESIGNING TECHNIQUE FOR PACKAGING INSPECTION
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机译:包装检查的LSI设计技术
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摘要
PROBLEM TO BE SOLVED: To enable to detect at which terminal an anomaly has occurred by providing as inspecting circuit inside a LSI and detecting that the logical level of an unused input terminal becomes anomalous due to a mounting failure, etc. ;SOLUTION: The logical level of an output signal 'DCT' of a multiple-input NAND circuit 6 is observed. It is normal when the logical level is 'low', and an anomaly has occurred when it is 'high'. In the case that 'DCT' is 'high', only output signals 'DCT(2n-1)' (odd numbers) of an NAND circuit 5 are observed for specifying failure locations. In the case that only 'DCT3' is, for example, 'high' here, the location of 'NC-IN2' or 'NC-IN3' is suspected of developing a failure. 'DCT2' and 'DCT4' are further observed, and a failure has occurred in 'NC-IN2' in the case that 'DCT2' = 'high' and that 'DCT4' = 'low'. In the case that 'DCT4' = 'high' and that 'DCT2' ='low', a failure has occurred in 'NC-IN3'.;COPYRIGHT: (C)2000,JPO
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