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CMOS LOGIC CIRCUIT ELEMENT, SEMICONDUCTOR DEVICE AND ITS MANUFACTURE, AND METHOD FOR DESIGNING SEMICONDUCTOR CIRCUIT USED IN THE MANUFACTURE
CMOS LOGIC CIRCUIT ELEMENT, SEMICONDUCTOR DEVICE AND ITS MANUFACTURE, AND METHOD FOR DESIGNING SEMICONDUCTOR CIRCUIT USED IN THE MANUFACTURE
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机译:CMOS逻辑电路元件,半导体器件及其制造以及用于该制造中的半导体电路的设计方法
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摘要
PROBLEM TO BE SOLVED: To provide a semiconductor device, which can be increased in operating speed and reduced in power consumption, even when the device is made finer and has a superior electrical characteristics, a method for manufacturing the device, and a method for designing a semiconductor circuit used in the method. ;SOLUTION: In a semiconductor device, a conductive region 3a is formed on the main surface of a semiconductor substrate 1. A first wiring layer 10a is electrically connected to the conductive region 3a, has a relatively short wiring length, and contains a material having a relatively high electrical resistance. A first insulator 11 is formed to surround the first wiring layer 10a and has a relatively low dielectric constant. A second wring layer 28a is formed on the main surface of the substrate 1, contains a material having an electrical resistance which is lower than that of the material contained in the first wiring layer 10a, and has a shorter wiring length than that of the layer 10a. Second insulators 24, 25, and 29 are formed so as to surround the second wiring layer 28a and have higher dielectric constants than that of the first insulator 11.;COPYRIGHT: (C)2000,JPO
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