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Operational amplifier with high common-mode rejection
Operational amplifier with high common-mode rejection
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机译:具有高共模抑制比的运算放大器
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摘要
The operational amplifier has a voltage divider (1, 2) connected between the output connections (39, 40) and to a symmetrical end stage (3, 4). A first differential amplifier stage (5 to 7) has outputs connected to a load and to an input connection of the end stage. Two further differential amplifier stages (15 to 17; 23 to 25) are connected in parallel. Both first input connections are connected to a reference potential and their other inputs are connected to the node of the voltage divider. Their output connection is connected to a load. The symmetrical end stage is formed by an emitter follower using each of the differential amplifier stages. IMAGE
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