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Method and apparatus for improving the apparent accuracy of a data receiver clock circuit

机译:用于提高数据接收器时钟电路的视在精度的方法和装置

摘要

The apparent accuracy of a clock circuit (20) used to recover timing and transmitted information signals in a data receiver is improved. A timing relationship inherent in a received signal (10) is detected (34, 40) prior to the acquisition of a timing component embedded (16) in a desired information portion of the received signal. The timing relationship has an accuracy that is greater than the accuracy of the clock circuit (20). The clock circuit (20) is controlled in response to the timing relationship to operate with an improved range of accuracy. Thereafter, the embedded timing component is acquired and used to control the clock circuit. In an illustrated embodiment, the timing relationship is derived from a symbol rate (40) of the received signal. In an alternate embodiment, the timing relationship is obtained from a separate transmitted reference signal (34), such as a transmitted television signal.
机译:用于恢复定时和数据接收器中发送的信息信号的时钟电路(20)的表观精度得到了改善。在获取嵌入在接收信号的期望信息部分中的定时分量(16)之前,检测(34、40)接收信号(10)中固有的定时关系。定时关系的精度大于时钟电路(20)的精度。响应于定时关系来控制时钟电路(20),以提高精度范围。此后,获取嵌入式定时分量并将其用于控制​​时钟电路。在示出的实施例中,定时关系从接收信号的符号率(40)导出。在替代实施例中,从诸如发射的电视信号之类的单独的发射参考信号(34)获得定时关系。

著录项

  • 公开/公告号EP0671828B1

    专利类型

  • 公开/公告日2000-06-07

    原文格式PDF

  • 申请/专利权人 GEN INSTRUMENT CORP;

    申请/专利号EP19950100183

  • 发明设计人 MORONEY PAUL;WALKER G. KENT;

    申请日1995-01-09

  • 分类号H04L7/00;

  • 国家 EP

  • 入库时间 2022-08-22 01:49:05

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