Interface circuit lying between a logic circuit having a low supply voltage and a TTL- or a CMOS-logic circuit

摘要

The first inverting amplifier (1) converts a low voltage logic signal into an inverted intermediate amplitude logic signal which is amplified and inverted by the second inverting amplifier (2). A signal standardisation circuit (3) converts this signal (slea) to an inverted TTL logic signal (NOT-slea) from which a power inverting amplifier circuit (4) produces an amplified TTL logic signal (sls). The first and second inverting amplifiers have a control circuit (5) receiving a control signal to reduce the static power consumption when in waiting mode. Its output is connected to the grid of a power transistor (12) in the first stage and the grids of a first (252) and second (252a) inhibitor transistor.