Galois field multiplier for Reed-Solomon decoder

摘要

A Reed-Solomon decoder includes an optimized Galois Field multiplication circuit. The circuit has a plurality of multipliers, connected in a linear chain, wherein a first multiplicand of the first multiplier is the magnitude A, and the second multiplicand is a constant. The circuit operates on a linear combination of alpha values that sum to α^j, each multiplier in the chain generating a succeeding alpha value. A plurality of selectors enable the outputs of the multipliers according to the magnitude α^j. An addition circuit, preferably realized as a logical network of XOR gates, is connected to the selectors for adding the enabled outputs of the multipliers to form the final product.