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EXTRA REGISTER MINIMIZES CPU IDLE CYCLES DURING CACHE REFILL
EXTRA REGISTER MINIMIZES CPU IDLE CYCLES DURING CACHE REFILL
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机译:重新缓存期间,额外的寄存器可使CPU空闲周期最小化
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摘要
A CPU has an execution unit for operating on data under instruction control. A cache and a buffer register are coupled in parallel to an input of the execution unit. The buffer register supplies an information item, such as data or an instruction, to the execution unit upon the cache having completed a refill process.
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