Synchronous actions sequencer in a processor system and integrated circuit including such a sequencer

摘要

The sequencer (14) has an instruction register (18) with a date field (19) holding the execution date of an instruction, an instruction field (20) and a data field (21). A comparator (22) receives the execution date from the system clock and from the instruction date field, and a controller (23) decodes the instruction and activates a peripheral device, without intervention of the processor.