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GaN film having a reduced threading dislocations density and fabrication method thereof

机译:具有降低的螺纹位错密度的GaN膜及其制造方法

摘要

A semiconductor thin film of e.g. G or N includes an underlying semiconductor layer (2) in which a plurality of facets (1) are arranged, and a selectively grown/buried semiconductor layer (3) formed to cover the underlying semiconductor layer (2), wherein the facets (1) are formed by planes tilted with respect to the disposition plane of the underlying semiconductor layer (2). In this semiconductor thin film, threading-dislocations (d) are formed in the selectively grown/buried semiconductor layer (3) in such a manner that each of the threading-dislocations (d) bendingly extends from one of the facets (1) of the underlying semiconductor layer (2) in the direction substantially along the disposition plane of the underlying semiconductor layer (2), being joined to another of the threading-dislocations (d) bendingly extending from the opposed one of the facets (1), and bendingly extends from the joined portion in the direction crossing the disposition plane of the underlying semiconductor layer (2).
机译:半导体薄膜例如G或N包括其中布置有多个小面(1)的下层半导体层(2)以及形成为覆盖下层半导体层(2)的选择性生长/掩埋的半导体层(3),其中,这些小面(1 )由相对于下面的半导体层(2)的布置平面倾斜的平面形成。在该半导体薄膜中,以这样的方式在选择性生长/掩埋的半导体层(3)中形成穿通位错(d),以使各穿通位错(d)从图1的一个小面(1)弯曲地延伸。在基本上沿着下面的半导体层(2)的布置平面的方向上,下面的半导体层(2)与从相对的一个小面(1)弯曲延伸的另一个螺纹位错(d)接合,并且从接合部分沿与下面的半导体层(2)的布置平面交叉的方向弯曲地延伸。

著录项

  • 公开/公告号EP1005068A2

    专利类型

  • 公开/公告日2000-05-31

    原文格式PDF

  • 申请/专利权人 SONY CORPORATION;

    申请/专利号EP19990402960

  • 发明设计人 FUNATO KENJI;TOMIYA SHIGETAKA;

    申请日1999-11-26

  • 分类号H01L21/20;H01L33/00;

  • 国家 EP

  • 入库时间 2022-08-22 01:47:29

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