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How to handle multiplication in arithmetic units

机译:如何以算术单位处理乘法

摘要

1. TECHNICAL FIELD OF THE INVENTION;How to handle multiplication in arithmetic units;2. Technical problem to be solved by the invention;Conventional multiplication methods require large registers to store intermediate results, and the lower end of the calculation results are used only for operations for rounding, which wastes a large portion of the register and increases the area of the device. To solve the problem.;3. Summary of the Solution of the Invention;Multiplying the lower bits of the multiplier and the multiplier and calculating the first rounding bit; multiplying the multiply result of the first step and the upper bits of the multiplicand and the multiplier; multiplying and calculating the second rounding bit using the multiplication result The multiplication operation is performed by dividing the final operation result and the final rounding bit into three steps from the operation result of the two steps, but using a pipeline technique for reducing the area and processing time of the device, The rounding process to reduce the error is based on the extension precision, but the rounding process can be simplified by controlling the position of the final rounding bit according to the value of the precision control signal determined at the beginning of the operation.
机译:1.发明领域;如何以算术单位处理乘法; 2。本发明要解决的技术问题;传统的乘法方法需要大的寄存器来存储中间结果,而计算结果的低端仅用于舍入运算,这浪费了寄存器的很大一部分并增加了寄存器的面积。设备。解决问题; 3。本发明的解决方案概述:将乘法器和乘法器的低位相乘并计算出第一舍入位;将第一步的乘法结果与被乘数和乘数的高位相乘;使用乘法结果对第二取整位进行乘法和计算通过将最终运算结果和最终取整位从两步的运算结果中分为三步来执行乘法运算,但是使用流水线技术来减少面积和处理减少误差的舍入过程是基于扩展精度的,但是可以根据在开始时确定的精度控制信号的值来控制最终舍入位的位置,从而简化舍入过程。操作。

著录项

  • 公开/公告号KR19990080739A

    专利类型

  • 公开/公告日1999-11-15

    原文格式PDF

  • 申请/专利权人 김영환;

    申请/专利号KR19980014194

  • 发明设计人 강혁;

    申请日1998-04-21

  • 分类号G06F7/52;

  • 国家 KR

  • 入库时间 2022-08-22 01:46:35

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