CIRCUIT FOR MULTIPLEXING/INVERSE MULTIPLEXING DATA USING FIFO MEMORIES IN HIGH-BIT-RATE DIGITAL SUBSCRIBER LINE DEVICE

摘要

PURPOSE: circuit for be multiplexed/inverse multiplexing provides to using first in FIFO (first in first out) memory, the device of these HDSL (high bitrate digital subscriber line road) for possessing stable data transmission. CONSTITUTION: circuit includes for being multiplexed/reverse data multiplexing: the clock E1 generations of E1 map clocks generator (300) are mapped to data; FIFO (First-In First-Out) memory (215), for storing the first, second memory of E1 data according to time slot, successively by write clock; A kind of HDSL (high bitrate digital subscriber line road) frame controllers (400) are used to carry out the mapping (300) that basic HDSL frames are produced from clock generator E1 by receiving, for the synchronization between adjusting, data terminal and line, and clock is provided to read data from push-up storage (215); First in first out data input/output confirms that (500) are latched and is recorded in push-up storage (215) by controlling clock, compare two values, with for resetting push-up storage (215), if two values are different; The data that E1/2 outputs are sent with a HDSL frames mapping (600), by from first, second push-up storage (215) and line, a frame by mapping E1/2 data makes in HDSL frames (420).