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LOW POWER DIGITAL CIRCUIT HAVING IMPROVED NOISE IMMUNITY
LOW POWER DIGITAL CIRCUIT HAVING IMPROVED NOISE IMMUNITY
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机译:低功耗数字电路改善了抗噪能力
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摘要
PURPOSE: A very low power logic circuit is to improve a noise impunity and reduce a power consumption. CONSTITUTION: A low power digital circuit comprises a first pair of first type input FETs(Field Effect Transistors)(40) cross-coupled gate-to-source and a pair of second type output FETs(42) cross-coupled gate-to-drain. Each source of the first type FETs receives one of differential input signals. Each source of the second type FETs is directly coupled to a first voltage terminal. Each drain the second type FETs is directly coupled to one of drains of the first type FETs. A first output of first node which is between one of drains of the first type FETs and one of drains of the second type FETs provides a first output signal having a voltage swing higher than the differential input signals. A second output of second node which is between another of drains of the first type FETs and another of drains of the second type FETs provides a second output signal which is complementary to the first output signal.
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