NON-VOLATILE SEMICONDUCTOR MEMORIES HAVING BOOSTING LINES SELF-ALIGNED WITH WORD LINES

摘要

Each memory transistor includes a drain, a channel, a source, a floating gate, and a control gate, and in the nonvolatile semiconductor memory device in which the control gates of the plurality of memory transistors are integrally formed with at least one word line, an interlayer insulating layer is formed on the word line. The nonvolatile semiconductor memory device has a boosting line self-aligned with the word line. During the program, a first voltage is applied to the word line and a second voltage is applied to the boosting line. The voltage on the word line is then increased by the capacitive coupling of the second voltage on the boosting line and thereby the selected memory V transistor is programmed. Therefore, since a voltage lower than the program voltage is used for the selected word line, the chip area can be reduced and high speed programming is possible.