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A METHOD FOR PROGRAMMING A SINGLE EPROM OR FLASH MEMORY CELL TO STORE MULTIPLE LEVELS OF DATA THAT UTILIZES A FORWARD-BIASED SOURCE-TO-SUBSTRATE JUNCTION
A METHOD FOR PROGRAMMING A SINGLE EPROM OR FLASH MEMORY CELL TO STORE MULTIPLE LEVELS OF DATA THAT UTILIZES A FORWARD-BIASED SOURCE-TO-SUBSTRATE JUNCTION
Multiple logic levels can be programmed into a single EEPROM or flash memory cell by applying a corresponding number of programming voltages to the control gate of a memory cell having a positive-biased source-to-substrate junction and a reverse-biased drain-to-substrate junction. In programming, the bias condition forms substrate column electrons that accumulate on the floating gate in addition to the channel column electrons. By using substrate thermal electrons, much lower control gate voltages can be used during programming. However, it is particularly important that, in the absence of channel column electrons, the substrate column electrons and holes are collected at stable charges associated with the control gate voltage used during programming and the programmed limit voltage of the cell.
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