Local clock signal generation circuit for semiconductor memory element uses phase mixers receiving signals from different points along internal clock signal line for providing respective local clock signals

摘要

The circuit uses an internal clock signal circuit (100) for providing an internal clock signal (ICLK), synchronized with an external clock signal (ECLK), which is fed to a clock signal line (130) for supplying the internal clock signal to a number of internal circuits (120-128). A number of phase mixers (110a-110i) receive the signals from 2 points along the clock signal line for providing a number of local clock signals (LCLK0-LCLK8). Also included are Independent claims for the following; (a) a semiconductor memory element; and (b) a local clock signal generation method.