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Discrete / - inverse discrete cosine - transform processor and data processing method

机译:离散/逆离散余弦变换处理器和数据处理方法

摘要

PURPOSE:To miniaturize the circuit scale and to increase the operating speed of a DCT processor by performing the pre-processing with the addition/ subtraction before a product sum operation in a DCT processing state and then performing the post-processing with the addition/subtraction after a product sum operation in an inverse DCT processing state, respectively. CONSTITUTION:In a DCT processing state, the data inputted/outputted through an input terminal 4 are rearranged by a data rearranging circuit 2 after undergoing the addition/subtraction through a pre-processing part 1 and then sent to a product sum part 3 in the order of low-order bits. The data undergone a product sum operation through the part 3 are transmitted through a post- processing part 7 and outputted through an output terminal 5 as they are. In an inverse DCT processing state, the data inputted through the terminal 4 are rearranged by the circuit 2 after passing through the part 1 and sent to the part 3 in the order of low order bits. The data undergone a sum product operation through the part 3 are sent to the part 7 to undergo the addition/subtraction for calculation of the output data and then outputted through the terminal 5.
机译:目的:通过在DCT处理状态下进行乘积和运算之前执行加/减预处理,然后执行加/减后处理,以最小化电路规模并提高DCT处理器的运行速度在逆DCT处理状态下分别进行乘积求和运算之后。组成:在DCT处理状态下,通过输入端4输入/输出的数据经过预处理部分1的加/减后,由数据重排电路2进行重排,然后发送到数据处理部分3中的乘积和部分3。低阶位的顺序。通过部分3进行乘积求和运算的数据通过后处理部分7发送,并按原样通过输出端子5输出。在逆DCT处理状态下,通过端子4输入的数据在经过部分1之后被电路2重新排列,并以低序位的顺序发送到部分3。经过部分3的求和运算的数据被发送到部分7,以进行加/减以计算输出数据,然后通过终端5输出。

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