NARROW CHANNEL-FREE TRANSISTOR AND MANUFACTURING METHOD THEREOF USING DROWNED CONDUCTIVE SHIELDING IN TRENCH INSULATION

摘要

A narrow channel free DRAM cell transistor structure is provided for submicron isolation pitch DRAMs having a weakly doped substrate (200) and having a threshold voltage independent of the active width using conductive shielding ( 214a) in shallow trench insulation (STI) (220). The resulting cell transistor structure is highly immune to parasitic E field penetration from the gate and neighboring storage node junctions via the STI and will be very suitable for DRAM technology. gigabit scale. The conductive shield is biased using the negative voltage to minimize sidewall depletion in the substrate.