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Real time quiescent current test limit methodology
Real time quiescent current test limit methodology
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机译:实时静态电流测试限制方法
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摘要
A method of sorting dies found on wafers is disclosed. Each wafer is part of a set of wafers and the sorting rejects some of the dies. The method first selects an acceptable deviation within an abstract distribution. A respective test parameter is measured and recorded for each die in the set of wafers, and a distribution of the test parameter across the set of wafers is calculated. Based on this distribution and the acceptable deviation, a test parameter limit is set and any dies having a test parameter value greater than the limit are rejected.
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